Title: Design and Implementation of AMBA AHB Protocol
Publisher: Guru Nanak Publications
Series: Volume 2 Issue 2
Authors: Khaja Mujeebuddin Quadry and Syed Abdul Sattar
This paper describes Design andImplementation
of the AHB protocol using verilog HDL on FPGA
Spartan 3E.The simulation is carried out using Xillinx ISE
9.2i Tool. The AHB is part of the AMBA protocol family.
The AMBA AHB is for high-performance, high clock
frequency system modules. The AHB acts as the highperformance
system backbone bus. AHB supports the
efficient connection of processors, on-chip memories and
off-chip external memory Interfaces with low-power
peripheral macro cell functions. All signal transitions are
only related to the rising edge of the clock to enable the
integration of AHB peripherals easily into any design flow.
Every transfer takes at least two cycles. The verification of
the functionality of the design is carried out by the
applying the sequence of test cases and compared with
AMBA protocol, HDL.